Gallium nanolayers featuring on-chip superconductivity in silicon


Gallium nanolayers featuring on-chip superconductivity in silicon

Skrotzki, R.; Herrmannsdörfer, T.; Fiedler, J.; Heera, V.; Voelskow, M.; Mücklich, A.; Schmidt, B.; Skorupa, W.; Gobsch, G.; Helm, M.; Wosnitza, J.

Abstract

We demonstrate the feasibility of embedding superconducting Ga nanolayers in commercial (100) oriented silicon wafers and discuss the possibility of potential device applications [1]. Ion implantation and rapid thermal annealing, known as versatile tools of microelectronic technology, have been used for inserting and distributing a gallium dose of up to 4 × 1016 cm2. As proven by structural analysis, a 10 nm thin layer of amorphous Ga-rich precipitates forms during annealing at 600 - 700°C. These structures exhibit a superconducting transition at 7 K. Extended resistivity and magnetization measurements reveal in-plane critical fields around 14 T and critical current densities exceeding 2 kA/cm2. In summary, we proceed with an optimistic outlook concerning the implementation of prospective microstructuring. After all, this would be the next step towards the development of novel semiconductor-based superconducting devices.

Beteiligte Forschungsanlagen

  • Hochfeld-Magnetlabor (HLD)
  • Vortrag (Konferenzbeitrag)
    DPG Frühjahrstagung der Sektion AMOP (SAMOP) und der Sektion Kondensierte Materie (SKM) 2011, 13.-18.03.2011, Dresden, Deutschland

Permalink: https://www.hzdr.de/publications/Publ-15502