Top-down fabrication and characterization of reconfigurable silicon nanowires

The following work illustrates characterization of reconfigurable, undoped silicon nanowire field effect transistors with Schottky junctions fabricated on silicon on insulator (SOI) substrate by top-down process. The fabrication scheme is based on electron beam lithography (EBL) using hydrogen silsesquioxane (HSQ), a negative tone electron beam resist, followed by inductively coupled plasma (ICP) etching. The etch recipe was optimised in context of selectivity, sidewall roughness and anisotropy by selecting an appropriate gas chemistry (SF6/C4F8) and controlling the ICP hardware parameters like gas flow, mixed gas ratio, plasma power and chamber pressure. We produced silicon nanowires of 20 nm width and nanowire arrays with pitch of 200 nm. 50 nm thick nickel (Ni) layer was sputtered on the SiNWs at lithographically defined areas followed by lift-off and thermal annealing to create Nickel-Silicide Schottky junctions inside the nanowires. In this way, the source and drain region was formed creating silicide-silicon-silicide contacts. Transport properties of these nanowires can be modulated from P-type to N-type and vice-versa by changing polarity of the back gate