Publikationsrepositorium - Helmholtz-Zentrum Dresden-Rossendorf

Scaling down of CMOS faces strong challenges due to which new materials, enhanced functionality and new device concepts have gained importance. These concepts include undoped silicon nanowire based reconfigurable devices which can be programmed as p-FET or n-FET by controlling the electrostatic potential applied across gate. In this work, electrical characterization of undoped sub-20 silicon nanowires (SiNWs) is reported. SiNWs are fabricated on intrinsic SOI substrates in <110> and <100> crystal directions by a top down approach. Hydrogen silsesquioxane (HSQ), a negative tone electron beam resist is used for nano- patterning as well as hard mask for etching. Nanowire etching process is optimized using an inductively coupled plasma (ICP) source and C₄F₈/SF₆/O₂ mixed gas recipe at 18 ^oC. These NWs are oxidized to form a SiO₂ shell and subsequently silicidized. For silicidation the SiO₂ shell is wet etched at pre-defined positions followed by Nickel(Ni) sputtering and diffusion which yield silicide-silicon(Schottky) junctions. Ni is used for silicidation to selectively control the charge carriers injection at the junctions. Different transport and silicidation progress was observed in <110> and <100> crystal directions.